Dr.-Ing. Jan Richter-Brockmann

Dortmund, Germany · jan.r-remove-ichterbrockmann@gmail.com

Hello, my name is Jan Richter-Brockmann and I am working as a Post-Doc at the Chair for Security Engineering at the Ruhr University Bochum. I studied electrical engineering at RWTH Aachen University from 2012 to 2017 and wrote my master’s thesis on a hardware accelerator for neuronal networks. Afterwards, I moved to the Ruhr University Bochum and successfully completed my PhD in 2023 about Secure and Efficient Hardware Implementations for Modern Cryptography.


Boards & Volunteering



  • CAST/GI PhD Award
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  • CASCADE
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  • TCHES
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  • TCHES
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Education

Ruhr University Bochum

Post Doc
Computer Science, IT Security

2023 - now

Ruhr University Bochum

Doctoral Studies, PhD
Electrical Engineering, Computer Science, IT Security

2018 - 2023

RWTH Aachen

Master of Science
Electrical Engineering

2015 - 2017

RWTH Aachen

Bachelor of Science
Electrical Engineering

2012 - 2015

Interests

Computer-Aided Security
  • Verification of Countermeasures against Physical Attacks
  • Secure Generation of Cryptographic Hardware Designs
Physical Attacks and Countermeasures
  • Efficient Designs of Countermeasures against Physical Attacks
  • Side-Channel Attacks
  • Fault-Injection Attacks
  • Combined Attacks
Post-Quantum Cryptography
  • Efficient Hardware Designs of PQC Schemes
  • Secure Implementations of PQC Schemes

Publications

A collection of articles, presentations or talks, covering my research on physical attacks and countermeasures, computer-aided security, and post-quantum cryptography.

Paper - INDIANA - Verifying (Random) Probing Security through Indistinguishability Analysis.

February 2025

Paper - Formal Definition and Verification for Combined Random Fault and Random Probing Security.

December 2024

Talk - Computer-aided Verification for Countermeasures against Physical Attacks.

October 2024

Paper - Combined Threshold Implementation.

September 2024

Paper - Gadget-based Masking of Streamlined NTRU Prime Decapsulation in Hardware.

September 2024

Paper - Combined Private Circuits - Combined Security Refurbished.

November 2023

Talk - Computer-aided Verification for Countermeasures against Physical Attacks.

September 2023

Paper - Dependability of Future Edge-AI Processors: Pandora's Box.

May 2023

Paper - A Holistic Approach Towards Side-Channel Secure Fixed-Weight Polynomial Sampling.

May 2023

Paper - Revisiting Fault Adversary Models - Hardware Faults in Theory and Practice.

February 2023

Dissertation - Secure and Efficient Hardware Implementations for Modern Cryptography.

January 2023

Paper - CINI MINIS: Domain Isolation for Fault and Combined Security.

November 2022

Paper - BIKE: Bit Flipping Key Encapsulation

October 2022

Paper - Efficiently Masking Polynomial Inversion at Arbitrary Order.

September 2022

Paper - Racing BIKE: Improved Polynomial Multiplication and Inversion in Hardware.

September 2022

Paper - VERICA - Verification of Combined Attacks: Automated formal verification of security against simultaneous information leakage and tampering.

September 2022

Paper - Folding BIKE: Scalable Hardware Implementation for Reconfigurable Devices.

May 2022

Paper - FIVER - Robust Verification of Countermeasures against Fault Injections.

September 2021

Paper - Deep Learning Multi-Channel Fusion Attack Against Side-Channel Protected Hardware.

December 2020

Paper - Concurrent Error Detection Revisited: Hardware Protection against Fault and Side-channel Attacks.

August 2020

Paper - Improved Side-Channel Resistance by Dynamic Fault-Injection Countermeasures.

July 2020

Paper - Revisiting ECM on GPUs.

January 2020

Blogs

Nifty tech tag lists from Wouter Beeftink